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| TS924 Rail-to-rail High Output Current Quad Operational Amplifier Rail-to-rail input and output Low noise: 9nV/Hz Low distortion High output current: 80mA (able to drive 32 loads) High-speed: 4MHz, 1.3V/s Operating from 2.7V to 12V Low input offset voltage: 900V max (TS924A) ESD Internal protection: 3kV Latch-up immunity Macromodel included in this specification D SO-14 (Plastic Micropackage) N DIP14 (Plastic Package) Description The TS924 is a rail-to-rail quad BiCMOS operational amplifier optimized and fully specified for 3V and 5V operation. High output current allows low load impedances to be driven. The TS924 exhibits a very low noise, low distortion, low offset and high output current capability making this device an excellent choice for high quality, low voltage or battery operated audio systems. The device is stable for capacitive loads up to 500pF. Pin connection (top view) P TSSOP14 (Thin Shrink Small Outline Package) Output 1 1 Inverting Input 1 2 Non-inverting Input 1 3 VCC + 4 Non-inverting Input 2 5 Inverting Input 2 6 Output 2 7 + + + + 14 Output 4 13 Inverting Input 4 12 Non-inverting Input 4 11 VCC 10 Non-inverting Input 3 9 8 Inverting Input 3 Output 3 Applications Headphone amplifier Piezoelectric speaker driver Sound cards MPEG boards, multimedia systems,... Line driver, buffer Cordless telephones and portable communication equipment Instrumentation with low noise as key factor November 2005 Rev 4 1/14 www.st.com 14 TS924 Order Codes Part Number TS924IN DIP14 TS924AIN TS924ID/IDT SO-14 TS924AID/AIDT TS924IPT -40C, +125C TS924AIPT TS924IYD/IYDT SO-14 (automotive grade level) TS924AIYD/AIYDT TS924IYPT TSSOP14 (automotive grade level) TS924IAIYPT Tape & Reel 924AIY Tube or Tape & Reel 924AIY 924IY TSSOP14 (Thin Shrink Outline Package) Tape & Reel 924AI 924IY Tube or Tape & Reel 924AI 924I Tube TS924AIN 924I Temperature Range Package Packaging Marking TS924IN 2/14 TS924 Absolute Maximum Ratings 1 Absolute Maximum Ratings Table 1. Symbol VCC Vid Vi Tstg Tj Supply voltage (1) Differential Input Voltage (2) Input Voltage (3) Storage Temperature Maximum Junction Temperature Thermal Resistance Junction to Ambient DIP14 Rthja SO14 TSSOP14 HBM: Human Body Model(4) ESD MM: Machine Model(5) CDM: Charged Device Model Output Short Circuit Duration Latch-up Immunity Soldering Temperature (10sec), leaded version Soldering Temperature (10sec), unleaded version Key parameters and their absolute maximum ratings Parameter Value 14 1 VDD -0.3 to V CC+0.3 -65 to +150 150 103 66 100 3 100 1 see note(6) 200 250 260 mA C C kV V kV C/W Unit V V V C C 1. All voltages values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. If Vid > 1V, the maximum input current must not exceed 1mA. In this case (Vid > 1V) an input serie resistor must be added to limit input current. 3. Do not exceed 14V. 4. Human body model, 100pF discharged through a 1.5k resistor into pin of device. 5. Machine model ESD, a 200pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (internal resistor < 5), into pin to pin of device. 6. There is no short-circuit protection inside the device: short-circuits from the output to Vcc can cause excessive heating. The maximum output current is approximately 80mA, independent of the magnitude of Vcc. Destructive dissipation can result from simultaneous short-circuits on all amplifiers. Table 2. Symbol VCC Vicm Toper Operating conditions Parameter Supply voltage Common Mode Input Voltage Range Operating Free Air Temperature Range Value 2.7 to 12 VDD -0.2 to VCC +0.2 -40 to +125 Unit V V C 3/14 Electrical Characteristics TS924 2 Electrical Characteristics Table 3. Symbol VCC = +3V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, RL connected to VCC/2 (unless otherwise specified) Parameter Input Offset Voltage - TS924 TS924A Tmin. Tamb Tmax. - TS924 TS924A Input Offset Voltage Drift Input Offset Current Vout = Vcc/2 Input Bias Current Vout = Vcc/2 High Level Output Voltage RL= 100k RL = 600 RL = 32 Low Level Output Voltage RL= 10k RL = 600 RL = 32 Large Signal Voltage Gain (Vout = 2Vpk-pk) RL= 10k RL = 600 RL = 32 Total Supply Current no load, V out = Vcc/2 Gain Bandwidth Product RL = 600 Common Mode Rejection Ratio Supply Voltage Rejection Ratio - V cc = 2.7 to 3.3V Output Short Circuit Current Slew Rate Phase Margin at Unit Gain - R L = 600, CL =100pF Gain Margin - RL = 600, CL =100pF Equivalent Input Noise Voltage - f = 1kHz Total Harmonic Distortion Vout = 2Vpk-pk, F = 1kHz, Av = 1, RL =600 Channel Separation 60 60 50 0.7 2 1 15 30 100 Min. Typ. Max. 3 0.9 5 1.8 Unit Vio mV DVio Iio Iib V/C nA nA VOH 2.90 2.87 2.63 V VOL 50 100 180 mV Avd 200 35 16 V/mV Icc GBP CMR SVR Io SR m Gm en THD Cs 4.5 4 80 85 80 1.3 68 12 9 7 mA MHz dB dB mA V/s Degrees dB nV ----------Hz 0.005 120 % dB 4/14 TS924 Table 4. Symbol Electrical Characteristics VCC = +5V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, RL connected to VCC/2 (unless otherwise specified) Parameter Input Offset Voltage - TS924 TS924A Tmin. Tamb Tmax. - TS924 TS924A Input Offset Voltage Drift Input Offset Current Vout = Vcc/2 Input Bias Current Vout = Vcc/2 High Level Output Voltage RL= 100k RL = 600 RL = 32 Low Level Output Voltage RL= 10k RL = 600 RL = 32 Large Signal Voltage Gain (Vout = 2Vpk-pk) RL= 10k RL = 600 RL = 32 Total Supply Current no load, Vout = V cc/2 Gain Bandwidth Product RL = 600 Common Mode Rejection Ratio Supply Voltage Rejection Ratio Vcc = 3V to 5V Output Short Circuit Current Slew Rate Phase Margin at Unit Gain RL = 600, CL =100pF Gain Margin RL = 600, CL =100pF Equivalent Input Noise Voltage f = 1kHz Total Harmonic Distortion Vout = 2Vpk-pk, F = 1kHz, Av = 1, RL =600 Channel Separation 60 60 50 0.7 2 1 15 30 100 Min. Typ. Max. 3 0.9 5 1.8 Unit Vio mV DVio Iio Iib V/C nA nA VOH 4.90 4.85 4.4 V VOL 50 120 300 mV Avd 200 40 17 V/mV Icc GBP CMR SVR Io SR m Gm en THD Cs 4.5 4 80 85 80 1.3 68 12 9 7 mA MHz dB dB mA V/s Degrees dB nV ----------Hz % 0.005 120 dB 5/14 Electrical Characteristics Figure 1. Output short circuit current vs. output voltage Figure 2. TS924 Output short circuit current vs. output voltage 100 100 80 80 Output Short-Circuit Current (mA) 60 Sink 40 Output Short-Circuit Current (mA) 60 40 20 0 -20 -40 -60 -80 Sink Vcc=0/12V 20 0 -20 -40 -60 -80 -100 0 2 4 6 8 10 12 Vcc=0/3V Source Source -100 0 0,5 1 1,5 2 2,5 3 Output Voltage (V) Output Voltage (V) Figure 3. Voltage gain and phase vs. frequency Figure 4. Output short circuit current vs. output voltage 100 80 Output Short-Circuit Current (mA) C L=500pF V CC=1.5V 60 40 20 0 -20 -40 -60 -80 -100 0 1 Sink Phase Vcc=0/5V Gain Source 2 3 4 5 Output Voltage (V) Figure 5. Voltage gain & phase vs. frequency Figure 6. THD + noise vs. frequency RL =10 CL=100pF VCC=1.5V RL =2k Vo=10Vpp VCC =6V Av= -1 Phase Gain 6/14 TS924 Figure 7. THD + noise vs. frequency Figure 8. Electrical Characteristics THD + noise vs. frequency R L=2k Vo=10Vpp V CC=6V Av= 1 RL=32 Vo=2Vpp VCC =1.5V Av= 10 Figure 9. THD + noise vs. Vout Figure 10. THD + noise vs. frequency RL=32 f=1kHz V CC=1.5V Av= -1 RL=32 Vo=4Vpp V CC=2.5V Av= 1 Figure 11. THD + noise vs. Vout Figure 12. THD + noise vs. Vout RL=2k f=1kHz VCC=1.5V Av= -1 7/14 Macromodel TS924 3 3.1 Macromodel Important note concerning this macromodel Please consider following remarks before using this macromodel. All models are a trade-off between accuracy and complexity (i.e. simulation time). Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. A macromodel emulates the NOMINAL performance of a TYPICAL device within SPECIFIED OPERATING CONDITIONS (i.e. temperature, supply voltage, etc.). Thus the macromodel is often not as exhaustive as the datasheet, its goal is to illustrate the main parameters of the product. Data issued from macromodels used outside of its specified conditions (Vcc, Temperature, etc.) or even worse: outside of the device operating conditions (Vcc, Vicm, etc.) are not reliable in any way. In Section 3.3, the electrical characteristics resulting from the use of these macromodels are presented. 3.2 Electrical characteristics from macromodelization Table 5. Symbol Vio Avd ICC Vicm VOH VOL Isink Isource GBP SR m RL = 10k RL = 10k VO = 3V VO = 0V RL = 600k RL = 10k, CL = 100pF RL = 600k RL = 10k No load, per operator Electrical characteristics resulting from macromodel simulation at V CC = 3V, VDD = 0V, R L, CL connected to VCC/2, Tamb = 25C (unless otherwise specified) Conditions Value 0 200 1.2 -0.2 to 3.2 2.95 25 80 80 4 1 68 Unit mV V/mV mA V V mV mA mA MHz V/s Degrees 8/14 TS924 Macromodel 3.3 Macromodel code ** Standard Linear Ics Macromodels, 1996. ** CONNECTIONS: * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT TS92X 1 2 3 4 5 * .MODEL MDTH D IS=1E-8 KF=2.664234E-16 CJO=10F * * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 8.125000E+00 RIN 15 16 8.125000E+00 RIS 11 15 2.238465E+02 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 153.5u VOFN 13 14 DC 0 IPOL 13 5 3.200000E-05 CPS 11 15 1e-9 DINN 17 13 MDTH 400E-12 VIN 17 5 -0.100000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.400000E+00 FCP 4 5 VOFP 1.865000E+02 FCN 5 4 VOFN 1.865000E+02 FIBP 2 5 VOFP 6.250000E-03 FIBN 5 1 VOFN 6.250000E-03 * GM1 STAGE *************** FGM1P 119 5 VOFP 1.1 FGM1N 119 5 VOFN 1.1 RAP 119 4 2.6E+06 RAN 119 5 2.6E+06 * GM2 STAGE *************** G2P 19 5 119 5 1.92E-02 G2N 19 5 119 4 1.92E-02 R2P 19 4 1E+07 R2N 19 5 1E+07 ************************** VINT1 500 0 5 GCONVP 500 501 119 4 19.38 VP 501 0 0 GCONVN 500 502 119 5 19.38 VN 502 0 0 9/14 Macromodel ********* orientation isink isource VINT2 503 0 5 FCOPY 503 504 VOUT 1 DCOPYP 504 505 MDTH 400E-9 VCOPYP 505 0 0 DCOPYN 506 504 MDTH 400E-9 VCOPYN 0 506 0 *************************** F2PP 19 5 poly(2) VCOPYP VP 0 0 0 0 F2PN 19 5 poly(2) VCOPYP VN 0 0 0 0 F2NP 19 5 poly(2) VCOPYN VP 0 0 0 0 F2NN 19 5 poly(2) VCOPYN VN 0 0 0 0 * COMPENSATION ************ CC 19 119 25p * OUTPUT *********** DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 6.250000E+02 VIPM 28 4 5.000000E+01 HONM 21 27 VOUT 6.250000E+02 VINM 5 27 5.000000E+01 VOUT 3 23 0 ROUT 23 19 6 COUT 3 5 1.300000E-10 DOP 19 25 MDTH 400E-12 VOP 4 25 1.052 DON 24 19 MDTH 400E-12 VON 24 5 1.052 .ENDS ;TS92X ******* TS924 0.5 0.5 1.75 1.75 10/14 TS924 Package Mechanical Data 4 Package Mechanical Data In order to meet environmental requirements, ST offers these devices in ECOPACK (R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 4.1 DIP14 Package Plastic DIP-14 MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 1.27 3.3 2.54 0.050 8.5 2.54 15.24 7.1 5.1 0.130 0.100 0.51 1.39 0.5 0.25 20 0.335 0.100 0.600 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.055 0.020 0.010 0.787 0.065 TYP. MAX. inch P001A 11/14 Package Mechanical Data TS924 4.2 SO-14 package SO-14 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45 (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 8 (max.) PO13G 12/14 TS924 Package Mechanical Data 4.3 TSSOP14 package TSSOP14 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 13/14 Revision History TS924 5 Revision History Date May 2001 May 2005 July 2005 Revision 1 2 3 First Release Modifications on AMR Table 1 on page 3 (explanation of Vid and Vi limits, ESD MM and CDM values added, Rthja added) PPAP references inserted in the datasheet see Table on page 2. - Package mechanical data modified - TS924IYPT/TS924AYIPT PPAP reference inserted in Table on page 2. - Macromodel modified Changes Nov. 2005 4 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 14/14 |
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